AN ACCELERATION OF FPGA-BASED RAY TRACER

Authors

  • Raisa Malcheva Donetsk National Technical University, Ukraine
  • Mohammad Yunis Donetsk National Technical University, Ukraine

DOI:

https://doi.org/10.19044/esj.2014.v10n7p%25p

Abstract

The Hardware implementations of the Ray Tracing algorithm are analyzed. A possibility of not all pixels tracing is discussed. The structure of Modified FPGA-based system is proposed. A productivity of Modified Ray Tracing algorithm is researched.

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Published

2014-03-26

How to Cite

Malcheva, R., & Yunis, M. (2014). AN ACCELERATION OF FPGA-BASED RAY TRACER. European Scientific Journal, ESJ, 10(7). https://doi.org/10.19044/esj.2014.v10n7p%p

Issue

ESJ February 2014 /SPECIAL/ EDITION VOL.3

Section

Articles

License

This work is licensed under a Creative Commons Attribution 4.0 International License.