MODELISATION D’UN EMETTEUR A ETALEMENT DE SPECTRE PAR SEQUENCE DIRECTE EN VHDL-AMS

Authors

  • Aicha Alami Hassani Laboratoire Signaux Systèmes et Composants, Département de Génie Electrique, Faculté des, Sciences et Techniques, Fès, Maroc
  • Mohcine Zouak Laboratoire Signaux Systèmes et Composants, Département de Génie Electrique, Faculté des, Sciences et Techniques, Fès, Maroc
  • Farid Abdi Laboratoire Signaux Systèmes et Composants, Département de Génie Electrique, Faculté des, Sciences et Techniques, Fès, Maroc
  • Mostafa Mrabti Ecole Nationale des Sciences Appliquées, Fès, Maroc

DOI:

https://doi.org/10.19044/esj.2013.v9n6p%25p

Abstract

Many recent standards in telecommunications field are based on CDMA spread spectrum transmissions. In this paper, we describe a methodology for top-down design, modeling, and simulation of CDMA transmitter system using hardware description language VHDL-AMS. Details of VHDL-AMS implementation for each elementary block are shown. This paper together with the developed library of CDMA transmitter blocks are targeted towards engineers who work on behavioral modeling and simulation of complete CDMA systems using hardware description languages.

Downloads

Download data is not yet available.

PlumX Statistics

Downloads

Published

2013-02-28

How to Cite

Hassani, A. A., Zouak, M., Abdi, F., & Mrabti, M. (2013). MODELISATION D’UN EMETTEUR A ETALEMENT DE SPECTRE PAR SEQUENCE DIRECTE EN VHDL-AMS. European Scientific Journal, ESJ, 9(6). https://doi.org/10.19044/esj.2013.v9n6p%p